HD64F2357F20V Datasheet, PDF (122/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

Figure 5-4 shows a block diagram of the priority decision circuit.
Interrupt
control
mode 0 I
Interrupt source
Interrupt
acceptance
control
8-level
mask control
Default priority
determination
Vector number
I2 to I0
IPR
Interrupt control mode 2
Figure 5-4 Block Diagram of Interrupt Control Operation
(1) Interrupt Acceptance Control
In interrupt control mode 0, interrupt acceptance is controlled by the I bit in CCR.
Table 5-6 shows the interrupts selected in each interrupt control mode.
Table 5-6 Interrupts Selected in Each Interrupt Control Mode (1)
Interrupt Control Mode
0
2
Interrupt Mask Bits
I
0
1
×
Selected Interrupts
All interrupts
NMI interrupts
All interrupts
× : Don't care
(2) 8-Level Control
In interrupt control mode 2, 8-level mask level determination is performed for the selected interrupts in interrupt
acceptance control according to the interrupt priority level (IPR).
The interrupt source selected is the interrupt with the highest priority level, and whose priority level set in IPR is higher
than the mask level.
Table 5-7 Interrupts Selected in Each Interrupt Control Mode (2)
Interrupt Control Mode
0
2
Selected Interrupts
All interrupts
Highest-priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0).
Rev.6.00 Oct.28.2004 page 92 of 1016
REJ09B0138-0600H