HD64F2357F20V Datasheet, PDF (67/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

Type
Arithmetic
operations
Logic
operations
Shift
operations
Instruction
DIVXU
DIVXS
CMP
NEG
EXTU
EXTS
TAS
AND
OR
XOR
NOT
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
Size*¹
B/W
B/W
B/W/L
B/W/L
W/L
W/L
B
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
Function
Rd ÷ Rs → Rd
Performs unsigned division on data in two general
registers: either 16 bits ÷ 8 bits → 8-bit quotient and 8-bit
remainder or 32 bits ÷ 16 bits → 16-bit quotient and 16-
bit remainder.
Rd ÷ Rs → Rd
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits → 8-bit quotient and 8-bit
remainder or 32 bits ÷ 16 bits → 16-bit quotient and 16-
bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
0 – Rd → Rd
Takes the two's complement (arithmetic complement) of
data in a general register.
Rd (zero extension) → Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
Rd (sign extension) → Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
@ERd – 0, 1 → (<bit 7> of @ERd)*²
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register
and another general register or immediate data.
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register
and another general register or immediate data.
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general
register and another general register or immediate data.
¬ (Rd) → (Rd)
Takes the one's complement of general register
contents.
Rd (shift) → Rd
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (shift) → Rd
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (rotate) → Rd
Rotates general register contents.
1-bit or 2-bit rotation is possible.
Rd (rotate) → Rd
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
Rev.6.00 Oct.28.2004 page 37 of 1016
REJ09B0138-0600H