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HD64F2357F20V Datasheet, PDF (280/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series | |||
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Table 8-2 DTC Functions
Address Registers
Transfer Mode
Transfer Transfer
Activation Source Source Destination
⢠Normal mode
⢠IRQ
24 bits 24 bits
 One transfer request transfers one byte or one
word
 Memory addresses are incremented or
decremented by 1 or 2
 Up to 65,536 transfers possible
⢠Repeat mode
 One transfer request transfers one byte or one
word
⢠TPU TGI
⢠8-bit timer CMI
⢠SCI TXI or RXI
⢠A/D converter
ADI
⢠DMAC DEND
⢠Software
 Memory addresses are incremented or
decremented by 1 or 2
 After the specified number of transfers (1 to 256),
the initial state resumes and operation continues
⢠Block transfer mode
 One transfer request transfers a block of the
specified size
 Block size is from 1 to 256 bytes or words
 Up to 65,536 transfers possible
 A block area can be designated at either the
source or destination
Rev.6.00 Oct.28.2004 page 250 of 1016
REJ09B0138-0600H
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