HD64F2357F20V Datasheet, PDF (591/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

Section 18 RAM
18.1 Overview
The H8S/2357, H8S/2352, H8S/2398, and H8S/2392 have 8 kbytes of on-chip high-speed static RAM. The H8S/2394 has
32 kbytes of on-chip high-speed static RAM. The H8S/2390 has 4 kbytes of on-chip high-speed static RAM. The on-chip
RAM is connected to the CPU by a 16-bit bus, and accessing both byte data and word data can be performed in a single
state. Thus, high-speed transfer of word data is possible.
The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the system control register
(SYSCR).
18.1.1 Block Diagram
Figure 18-1 shows a block diagram of the 8-kbytes of on-chip RAM.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'FFDC00
H'FFDC02
H'FFDC04
H'FFDC01
H'FFDC03
H'FFDC05
H'FFFBFE
H'FFFBFF
Figure 18-1 Block Diagram of RAM (8 kbyte)
18.1.2 Register Configuration
The on-chip RAM is controlled by SYSCR. Table 18-1 shows the address and initial value of SYSCR.
Table 18-1 RAM Register
Name
System control register
Note: * Lower 16 bits of the address.
Abbreviation R/W
SYSCR
R/W
Initial Value
H'01
Address*
H'FF39
Rev.6.00 Oct.28.2004 page 561 of 1016
REJ09B0138-0600H