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HD64F2357F20V Datasheet, PDF (766/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series
(2) Control Signal Timing
Table 22-27 lists the control signal timing.
Table 22-27 Control Signal Timing
Condition A: VCC = 2.7 to 5.5 V, AVCC = 2.7 to 5.5 V, Vref = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 2 to 10 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Condition B: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, Vref = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 2 to 20 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Condition C: VCC = 3.0 to 5.5 V, AVCC = 3.0 to 5.5 V, Vref = 3.0 V to AVCC,
VSS = AVSS = 0 V, ø = 2 to 13 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Item
Condition A Condition B Condition C
Test
Symbol Min Max Min Max Min Max Unit Conditions
RES setup time
RES pulse width
t RESS
t RESW
200 —
20 —
200 —
20 —
200 —
20 —
ns Figure 22-70
t cyc
NMI reset setup time*
t NMIRS 250 — 200 — 250 — ns
NMI reset hold time*
t NMIRH 200 — 200 — 200 — ns
NMI setup time
t NMIS
250 — 150 — 250 — ns Figure 22-71
NMI hold time
t NMIH
10 — 10 — 10 — ns
NMI pulse width (exiting
software standby mode)
t NMIW
200 — 200 — 200 — ns
IRQ setup time
IRQ hold time
IRQ pulse width (exiting
software standby mode)
t IRQS
t IRQH
t IRQW
250 —
10 —
200 —
150 —
10 —
200 —
250 — ns
10 — ns
200 — ns
Note: * Applies to the ZTAT version only.
ø
RES
NMI
tRESS
tRESS
tNMIRS*
tRESW
tNMIRH*
Note: * Applies to the ZTAT version only.
Figure 22-70 Reset Input Timing
Rev.6.00 Oct.28.2004 page 736 of 1016
REJ09B0138-0600H