HD64F2357F20V Datasheet, PDF (612/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

19.7 Register Descriptions
19.7.1 Flash Memory Control Register 1 (FLMCR1)
Bit
7
6
5
FWE SWE
—
Initial value —*
0
0
Read/Write R
R/W
—
4
3
2
1
0
—
EV
PV
E
P
0
0
0
0
0
—
R/W R/W R/W R/W
Note: * Determined by the state of the FWE pin.
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode or erase-verify mode is
entered by setting SWE to 1 when FWE = 1. Program mode is entered by setting SWE to 1 when FWE = 1, then setting
the PSU bit in FLMCR2, and finally setting the P bit. Erase mode is entered by setting SWE to 1 when FWE = 1, then
setting the ESU bit in FLMCR2, and finally setting the E bit. FLMCR1 is initialized by a reset, and in hardware standby
mode and software standby mode. Its initial value is H'80 when a high level is input to the FWE pin, and H'00 when a low
level is input. When on-chip flash memory is disabled, a read will return H'00, and writes are invalid.
Writes to the SWE bit in FLMCR1 are enabled only when FWE = 1; writes to the EV and PV bits only when FWE=1 and
SWE=1; writes to the E bit only when FWE = 1, SWE = 1, and ESU = 1; and writes to the P bit only when FWE = 1,
SWE = 1, and PSU = 1.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory programming/erasing. See
section 19.14, Flash Memory Programming and Erasing Precautions, before using this bit.
Bit 7
FWE
0
1
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
Bit 6—Software Write Enable Bit (SWE): Enables or disables flash memory programming. SWE should be set before
setting bits ESU, PSU, EV, PV, E, P, and EB9 to EB0, and should not be cleared at the same time as these bits.
Bit 6
SWE
0
1
Description
Writes disabled
Writes enabled
[Setting condition]
When FWE = 1
(Initial value)
Bits 5 and 4—Reserved: These bits cannot be modified and are always read as 0.
Rev.6.00 Oct.28.2004 page 582 of 1016
REJ09B0138-0600H