HD64F2357F20V Datasheet, PDF (587/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

17.2 Register Descriptions
17.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1)
Bit
:
7
6
5
4
3
2
1
0
Initial value :
0
0
0
0
0
0
0
0
R/W
: R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DADR0 and DADR1 are 8-bit readable/writable registers that store data for conversion.
Whenever output is enabled, the values in DADR0 and DADR1 are converted and output from the analog output pins.
DADR0 and DADR1 are each initialized to H'00 by a reset and in hardware standby mode.
17.2.2 D/A Control Register (DACR)
Bit
:
7
6
5
4
3
2
1
0
DAOE1 DAOE0 DAE
—
—
—
—
—
Initial value :
0
0
0
1
1
1
1
1
R/W
: R/W
R/W
R/W
—
—
—
—
—
DACR is an 8-bit readable/writable register that controls the operation of the D/A converter.
DACR is initialized to H'1F by a reset and in hardware standby mode.
Bit 7—D/A Output Enable 1 (DAOE1): Controls D/A conversion and analog output for channel 1.
Bit 7
DAOE1
0
1
Description
Analog output DA1 is disabled
Channel 1 D/A conversion is enabled; analog output DA1 is enabled
(Initial value)
Bit 6—D/A Output Enable 0 (DAOE0): Controls D/A conversion and analog output for channel 0.
Bit 6
DAOE0
0
1
Description
Analog output DA0 is disabled
Channel 0 D/A conversion is enabled; analog output DA0 is enabled
(Initial value)
Rev.6.00 Oct.28.2004 page 557 of 1016
REJ09B0138-0600H