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HD64F2357F20V Datasheet, PDF (585/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series | |||
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Section 17 D/A Converter
17.1 Overview
The H8S/2357 Group includes a two-channel D/A converter.
17.1.1 Features
D/A converter features are listed below
⢠8-bit resolution
⢠Two output channels
⢠Maximum conversion time of 10 µs (with 20 pF load)
⢠Output voltage of 0 V to Vref
⢠D/A output hold function in software standby mode
⢠Module stop mode can be set
 As the initial setting, D/A converter operation is halted. Register access is enabled by exiting module stop mode.
17.1.2 Block Diagram
Figure 17-1 shows a block diagram of the D/A converter.
Module data bus
Internal data bus
Vref
AVCC
DA1
DA0
AVSS
8-bit
D/A
Legend:
DACR: D/A control register
DADR0,1: D/A data register 0, 1
Control circuit
Figure 17-1 Block Diagram of D/A Converter
Rev.6.00 Oct.28.2004 page 555 of 1016
REJ09B0138-0600H
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