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HD64F2357F20V Datasheet, PDF (715/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series
(1) Clock Timing
Table 22-4 lists the clock timing
Table 22-4 Clock Timing
Conditions:
VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, Vref = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 10 to 20 MHz, Ta = –20 to +75°C (regular specifications),
Ta = –40 to +85°C (wide-range specifications)
Item
Symbol
Clock cycle time
Clock high pulse width
Clock low pulse width
Clock rise time
Clock fall time
Clock oscillator setting
time at reset (crystal)
t cyc
t CH
t CL
t Cr
t Cf
t OSC1
Clock oscillator setting time
in software standby (crystal)
t OSC2
External clock output stabilization t DEXT
delay time
Condition
Min
Max
50
100
20
—
20
—
—
5
—
5
10
—
10
—
500
—
Unit
ns
ns
ns
ns
ns
ms
ms
µs
Test
Conditions
Figure 22-4
Figure 22-5
Figure 21-2
Figure 22-5
tcyc
tCH
tCf
ø
tCL
tCr
Figure 22-4 System Clock Timing
Rev.6.00 Oct.28.2004 page 685 of 1016
REJ09B0138-0600H