HD64F2357F20V Datasheet, PDF (502/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

For details of the multiprocessor communication function, see section 14.3.3, Multiprocessor Communication Function.
Bit 2
MP
0
1
Description
Multiprocessor function disabled
Multiprocessor format selected
(Initial value)
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the baud rate generator. The
clock source can be selected from ø, ø/4, ø/16, and ø/64, according to the setting of bits CKS1 and CKS0.
For the relation between the clock source, the bit rate register setting, and the baud rate, see section 14.2.8, Bit Rate
Register (BRR).
Bit 1
CKS1
0
1
Bit 0
CKS0
0
1
0
1
Description
ø clock
ø/4 clock
ø/16 clock
ø/64 clock
(Initial value)
14.2.6 Serial Control Register (SCR)
Bit
:
7
6
5
TIE
RIE
TE
Initial value :
0
0
0
R/W
: R/W
R/W
R/W
4
3
2
1
0
RE
MPIE TEIE CKE1 CKE0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output in asynchronous mode,
and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset, and by putting the device in standby mode or module stop mode. In the H8S/2398,
H8S/2394, H8S/2392, and H8S/2390, however, the value in SCR is initialized to H'00 by a reset, or in hardware standby
mode, but SCR retains its current state when the device enters software standby mode or module stop mode.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit data empty interrupt (TXI) request generation
when serial transmit data is transferred from TDR to TSR and the TDRE flag in SSR is set to 1.
Bit 7
TIE
Description
0
Transmit data empty interrupt (TXI) requests disabled*
(Initial value)
1
Transmit data empty interrupt (TXI) requests enabled
Note:* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag, then clearing it to 0, or
clearing the TIE bit to 0.
Rev.6.00 Oct.28.2004 page 472 of 1016
REJ09B0138-0600H