HD64F2357F20V Datasheet, PDF (904/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

MCR—Memory Control Register
H'FED6
Bus Controller
Bit
:
Initial value :
Read/Write :
7
TPC
0
R/W
6
5
4
3
2
1
0
BE RCDM CW2 MXC1 MXC0 RLW1 RLW0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W
Refresh Cycle Wait Control
0 0 No wait state inserted
1 1 wait state inserted
1 0 2 wait states inserted
1 3 wait states inserted
Multiplex Shift Count
0 0 8-bit shift
1 9-bit shift
1 0 10-bit shift
1—
2-CAS Method Select
0 16-bit DRAM space selected
1 8-bit DRAM space selected
RAS/CS Down Mode
0 DRAM interface: RAS up mode selected
1 DRAM interface: RAS down mode selected
Burst Access Enable
0 Burst disabled (always full access)
1 _{For DRAM space access, access in fast page mode}
TP Cycle Control
0 1-state precharge cycle is inserted
1 2-state precharge cycle is inserted
Rev.6.00 Oct.28.2004 page 874 of 1016
REJ09B0138-0600H