HD64F2357F20V Datasheet, PDF (245/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

7.5.8 DMAC Activation Sources
DMAC activation sources consist of internal interrupts, external requests, and auto-requests. The activation sources that
can be specified depend on the transfer mode and the channel, as shown in table 7-12.
Table 7-12 DMAC Activation Sources
Short Address Mode
Activation Source
Channels
0A and 1A
Internal ADI
Interrupts _TXI0
RXI0
TXI1
RXI1
TGI0A
TGI1A
TGI2A
TGI3A
TGI4A
TGI5A
External DREQ pin falling edge input ×
Requests _{DREQ pin low-level input ×}
Auto-request
×
Legend:
: Can be specified
× : Cannot be specified
Channels
0B and 1B
×
Full Address Mode
Normal
Mode
Block
Transfer
Mode
×
×
×
×
×
×
×
×
×
×
×
×
Activation by Internal Interrupt: An interrupt request selected as a DMAC activation source can be sent simultaneously
to the CPU and DTC. For details, see section 5, Interrupt Controller.
With activation by an internal interrupt, the DMAC accepts the request independently of the interrupt controller.
Consequently, interrupt controller priority settings are not accepted.
If the DMAC is activated by a CPU interrupt source or an interrupt source that is not used as a DTC activation source
(DTA = 1), the interrupt source flag is cleared automatically by the DMA transfer. With ADI, TXI, and RXI interrupts,
however, the interrupt source flag is not cleared unless the prescribed register is accessed in a DMA transfer. If the same
interrupt is used as an activation source for more than one channel, the interrupt request flag is cleared when the highest-
priority channel is activated first. Transfer requests for other channels are held pending in the DMAC, and activation is
carried out in order of priority.
When DTE = 0, such as after completion of a transfer, a request from the selected activation source is not sent to the
DMAC, regardless of the DTA bit. In this case, the relevant interrupt request is sent to the CPU or DTC.
In case of overlap with a CPU interrupt source or DTC activation source (DTA = 0), the interrupt request flag is not
cleared by the DMAC.
Rev.6.00 Oct.28.2004 page 215 of 1016
REJ09B0138-0600H