HD64F2357F20V Datasheet, PDF (251/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

Full Address Mode (Block Transfer Mode): Figure 7-22 shows a transfer example in which TEND output is enabled
and word-size full address mode transfer (block transfer mode) is performed from internal 16-bit, 1-state access space to
external 16-bit, 2-state access space.
DMA DMA DMA DMA DMA
read write read write dead
DMA DMA DMA DMA DMA
read write read write dead
ø
Address bus
RD
HWR
LWR
TEND
Bus release
Block transfer
Bus release
Last block transfer
Bus
release
Figure 7-22 Example of Full Address Mode (Block Transfer Mode) Transfer
A one-block transfer is performed for one transfer request, and after the transfer the bus is released. While the bus is
released, one or more bus cycles are inserted by the CPU or DTC.
In the transfer end cycle of each block (the cycle in which the transfer counter reaches 0), a one-state DMA dead cycle is
inserted after the DMA write cycle.
One block is transmitted without interruption. NMI generation does not affect block transfer operation.
Rev.6.00 Oct.28.2004 page 221 of 1016
REJ09B0138-0600H