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HD64F2357F20V Datasheet, PDF (600/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series
19.5.2 Programming and Verification
An efficient, high-speed programming procedure can be used to program and verify PROM data. This procedure writes
data quickly without subjecting the chip to voltage stress or sacrificing data reliability. It leaves the data H'FF in unused
addresses. Figure 19-4 shows the basic high-speed programming flowchart. Tables 19-7 and 19-8 list the electrical
characteristics of the chip during programming. Figure 19-5 shows a timing chart.
Start
Set programming/verification mode
VCC = 6.0 V ± 0.25 V,
VPP = 12.5 V ± 0.3 V
Address = 0
n=0
Yes
No
n < 25
n + 1→ n
Program with tPW = 0.2 ms ± 5%
No
Verification OK?
Address + 1 → address
Yes
Program with tOPW = 0.2n ms
No
Last address?
Yes
Set read mode
VCC = 5.0 V ± 0.25 V
VPP = VCC
No go
Fail
All addresses read?
Go
End
Figure 19-4 High-Speed Programming Flowchart
Rev.6.00 Oct.28.2004 page 570 of 1016
REJ09B0138-0600H