HD64F2357F20V Datasheet, PDF (232/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

The same value should be set in ETCRH and ETCRL.
In repeat mode, operation continues until the DTE bit is cleared. To end the transfer operation, therefore, you should clear
the DTE bit to 0. A transfer end interrupt request is not sent to the CPU or DTC.
By setting the DTE bit to 1 again after it has been cleared, the operation can be restarted from the transfer after that
terminated when the DTE bit was cleared.
Figure 7-7 illustrates operation in repeat mode.
Address T
Transfer
1 byte or word transfer performed in
response to 1 transfer request
IOAR
Address B
Legend:
Address T = L
Address B = L + (–1)^DTID • (2^DTSZ • (N–1))
Where : L = Value set in MAR
N = Value set in ETCR
Figure 7-7 Operation in Repeat mode
Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external requests, SCI
transmission data empty and reception data full interrupts, and TPU channel 0 to 5 compare match/input capture A
interrupts. External requests can be set for channel B only.
Rev.6.00 Oct.28.2004 page 202 of 1016
REJ09B0138-0600H