HD64F2357F20V Datasheet, PDF (241/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

Address T_A
1st block
2nd block
Transfer
Consecutive transfer
of M bytes or words
is performed in
response to one
request
Block area
Address T_B
Address B_B
Address B_A
Nth block
Legend:
Address TA = LA
Address TB = LB
Address BA = LA + SAIDE • (–1)^SAID • (2^DTSZ • (M•N–1))
Address BB = LB + DAIDE • (–1)^DAID • (2^DTSZ • (N–1))
Where : LA = Value set in MARA
LB = Value set in MARB
N = Value set in ETCRB
M = Value set in ETCRAH and ETCRAL
Figure 7-13 Operation in Block Transfer Mode (BLKDIR = 0)
Rev.6.00 Oct.28.2004 page 211 of 1016
REJ09B0138-0600H