HD64F2357F20V Datasheet, PDF (676/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

19.20.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
H'00000
EB0
H'01000
EB1
H'02000
EB2
H'03000
EB3
H'04000
EB4
H'05000
EB5
H'06000
EB6
H'07000
EB7
H'08000
This area can be accessed
from both the RAM area
and flash memory area
Flash memory
EB8 to EB11
On-chip RAM
H'FFDC00
H'FFEBFF
H'3FFFF
H'FFFBFF
Figure 19-52 Example of RAM Overlap Operation
Example in Which Flash Memory Block Area EB1 is Overlapped
1. Set bits RAMS, RAM2, RAM1, and RAM0 in RAMER to 1, 0, 0, 1, to overlap part of RAM onto the area (EB1) for
which real-time programming is required.
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks regardless of the value of
RAM2, RAM1, and RAM0 (emulation protection). In this state, setting the P or E bit in flash memory control
register 1 (FLMCR1) will not cause a transition to program mode or erase mode. When actually programming
a flash memory area, the RAMS bit should be cleared to 0.
2. A RAM area cannot be erased by execution of software in accordance with the erase algorithm while flash
memory emulation in RAM is being used.
3. Block area EB0 includes the vector table. When performing RAM emulation, the vector table is needed by the
overlap RAM.
Rev.6.00 Oct.28.2004 page 646 of 1016
REJ09B0138-0600H