HD64F2357F20V Datasheet, PDF (454/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

11.3.2 Output Timing
If pulse output is enabled, NDR contents are transferred to PODR and output when the specified compare match event
occurs. Figure 11-3 shows the timing of these operations for the case of normal output in groups 2 and 3, triggered by
compare match A.
ø
TCNT
TGRA
Compare match
A signal
NDRH
PODRH
PO8 to PO15
N
N+1
N
n
m
m
n
n
Figure 11-3 Timing of Transfer and Output of NDR Contents (Example)
Rev.6.00 Oct.28.2004 page 424 of 1016
REJ09B0138-0600H