HD64F2357F20V Datasheet, PDF (380/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

The TMDR registers are 8-bit readable/writable registers that are used to set the operating mode for each channel. The
TPU has six TMDR registers, one for each channel. The TMDR registers are initialized to H'C0 by a reset, and in
hardware standby mode.
TMDR register settings should be made only when TCNT operation is stopped.
Bits 7 and 6—Reserved: These bits cannot be modified and are always read as 1.
Bit 5—Buffer Operation B (BFB): Specifies whether TGRB is to operate in the normal way, or TGRB and TGRD are to
be used together for buffer operation. When TGRD is used as a buffer register, TGRD input capture/output compare is not
generated.
In channels 1, 2, 4, and 5, which have no TGRD, bit 5 is reserved. It is always read as 0 and cannot be modified.
Bit 5
BFB
0
1
Description
TGRB operates normally
TGRB and TGRD used together for buffer operation
(Initial value)
Bit 4—Buffer Operation A (BFA): Specifies whether TGRA is to operate in the normal way, or TGRA and TGRC are to
be used together for buffer operation. When TGRC is used as a buffer register, TGRC input capture/output compare is not
generated.
In channels 1, 2, 4, and 5, which have no TGRC, bit 4 is reserved. It is always read as 0 and cannot be modified.
Bit 4
BFA
0
1
Description
TGRA operates normally
TGRA and TGRC used together for buffer operation
(Initial value)
Bits 3 to 0—Modes 3 to 0 (MD3 to MD0): These bits are used to set the timer operating mode.
Bit 3 Bit 2 Bit 1
MD3*¹ MD2*² MD1
Bit 0
MD0
Description
0
0
0
0
Normal operation
(Initial value)
1
Reserved
1
0
PWM mode 1
1
PWM mode 2
1
0
0
Phase counting mode 1
1
Phase counting mode 2
1
0
Phase counting mode 3
1
Phase counting mode 4
1
×
×
×
—
×: Don’t care
Notes: 1. MD3 is a reserved bit. In a write, it should always be written with 0.
2. Phase counting mode cannot be set for channels 0 and 3. In this case, 0 should always be written to MD2.
Rev.6.00 Oct.28.2004 page 350 of 1016
REJ09B0138-0600H