HD64F2357F20V Datasheet, PDF (880/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

TMDR3—Timer Mode Register 3
Bit
:
7
6
—
—
Initial value :
1
1
Read/Write :
—
—
H'FE81
TPU3
5
4
3
2
1
0
BFB BFA MD3 MD2 MD1 MD0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W
Mode
0 0 0 0 Normal operation
1 Reserved
1 0 PWM mode 1
1 PWM mode 2
1 0 0 Phase counting mode 1
1 Phase counting mode 2
1 0 Phase counting mode 3
1 Phase counting mode 4
1 × × ×—
× : Don’t care
Notes: 1. MD3 is a reserved bit. In a write,
it should always be written with 0.
2. Phase counting mode cannot be
set for channels 0 and 3. In this
case, 0 should always be written
to MD2.
Buffer Operation A
0 TGRA operates normally
1 ^{TGRA and TGRC used together}
for buffer operation
Buffer Operation B
0 TGRB operates normally
1 ^{TGRB and TGRD used together}
for buffer operation
Rev.6.00 Oct.28.2004 page 850 of 1016
REJ09B0138-0600H