HD64F2357F20V Datasheet, PDF (287/1049 Pages) Renesas Technology Corp – Hardware Manual Renesas 16-Bit Single-chip Microcomputer H8S Family / H8S/2300 Series

8.3.6 Repeat Mode
In repeat mode, one operation transfers one byte or one word of data.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the initial state of the
transfer counter and the address register specified as the repeat area is restored, and transfer is repeated. In repeat mode the
transfer counter value does not reach H'00, and therefore CPU interrupts cannot be requested when DISEL = 0.
Table 8-6 lists the register information in repeat mode and figure 8-7 shows memory mapping in repeat mode.
Table 8-6 Register Information in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Designates source address
Designates destination address
Holds number of transfers
Designates transfer count
Not used
SAR or
DAR
Repeat area
Transfer
DAR or
SAR
Figure 8-7 Memory Mapping in Repeat Mode
Rev.6.00 Oct.28.2004 page 257 of 1016
REJ09B0138-0600H