MC68HC908AT32 Datasheet, PDF (97/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Functional Description
suffered a severe noise hit and the software must take appropriate action, depending on the application.
See 8.6 Interrupts.
These conditions apply when the PLL is in automatic bandwidth control mode:
• The ACQ bit (see 8.5.2 PLL Bandwidth Control Register) is a read-only indicator of the mode of the
filter. See 8.3.2.2 Acquisition and Tracking Modes.
• The ACQ bit is set when the VCO frequency is within a certain tolerance, ∆_TRK, and is cleared when
the VCO frequency is out of a certain tolerance, ∆_UNT. See Chapter 29 Electrical Specifications.
• The LOCK bit is a read-only indicator of the locked state of the PLL.
• The LOCK bit is set when the VCO frequency is within a certain tolerance, ∆_Lock, and is cleared
when the VCO frequency is out of a certain tolerance, ∆_UNL. See Chapter 29 Electrical
Specifications.
• CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s lock condition changes, toggling
the LOCK bit. (See 8.5.1 PLL Control Register.)
The PLL also can operate in manual mode (AUTO = 0). Manual mode is used by systems that do not
require an indicator of the lock condition for proper operation. Such systems typically operate well below
f_BUSMAX and require fast startup. The following conditions apply when in manual mode:
• ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
• Before entering tracking mode (ACQ = 1), software must wait a given time, t_ACQ (See Chapter 29
Electrical Specifications), after turning on the PLL by setting PLLON in the PLL control register
(PCTL).
• Software must wait a given time, t_AL, after entering tracking mode before selecting the PLL as the
clock source to CGMOUT (BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
8.3.2.4 Programming the PLL
Use this 3-step procedure to program the PLL.
1. Choose the desired bus frequency, f_BUSDES.
Example: f_BUSDES = 8 MHz
2. Calculate the desired VCO frequency, f_VCLKDES.
f_VCLKDES = 4 × f_BUSDES
Example: f_VCLKDES = 4 × 8 MHz = 32 MHz
3. Using a reference frequency, f_RCLK, equal to the crystal frequency, calculate the VCO frequency
multiplier, N. Round the result to the nearest integer.
N = ^{f--V----C-----L---K----D----E----S---}
fRCLK
Example: N = ^{3----2-----M-----H----z--} = 8
4 MHz
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
97