MC68HC908AT32 Datasheet, PDF (319/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port B
ATD[7:0] — ADC Channels
PTB7/ATD7–PTB0/ATD0 are eight of the 15 analog-to-digital converter channels. The ADC channel
select bits, CH[4:0], determine whether the PTB7/ATD7–PTB0/ATD0 pins are ADC channels or
general-purpose I/O pins. If an ADC channel is selected and a read of this corresponding bit in the port
B data register occurs, the data will be 0 if the data direction for this bit is programmed as an input.
Otherwise, the data will reflect the value in the data latch. (See Chapter 26 Analog-to-Digital Converter
(ADC-15).) Data direction register B (DDRB) does not affect the data direction of port B pins that are
being used by the ADC. However, the DDRB bits always determine whether reading port B returns to
the states of the latches or logic 0.
27.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a logic 1 to
a DDRB bit enables the output buffer for the corresponding port B pin; a logic 0 disables the output
buffer.
Address:
Read:
Write:
Reset:
$0005
Bit 7
6
5
4
3
2
1
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1
0
0
0
0
0
0
0
Figure 27-6. Data Direction Register B (DDRB)
Bit 0
DDRB0
0
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 27-7 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 27-7. Port B I/O Circuit
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
319