MC68HC908AT32 Datasheet, PDF (230/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog-to-Digital Converter (ADC-8)
Table 21-1. MUX Channel Select (Continued)
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Input Select
0
1
0
0
1
Unused⁽¹⁾
0
1
0
1
0
Unused⁽¹⁾
0
1
0
1
1
Unused⁽¹⁾
0
1
1
0
0
Unused⁽¹⁾
0
1
1
0
1
Unused⁽¹⁾
0
1
1
1
0
Unused⁽¹⁾
Range 01111 ($0F) to 11010 ($1A)
Unused⁽¹⁾
Unused⁽¹⁾
1
1
0
1
1
Reserved
1
1
1
0
0
V_DDAREF(2)
1
1
1
0
1
V_REFH(2)
1
1
1
1
0
AV_SS/V_REFL(2)
1
1
1
1
1
ADC power off
1. If any unused channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are
used to verify the operation of the ADC converter both in production test and for user
applications.
21.7.2 ADC Data Register
One 8-bit result register is provided. This register is updated each time an ADC conversion completes.
Address: $0039
Bit 7
6
5
4
3
2
1
Bit 0
Read: AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write: R
R
R
R
R
R
R
R
Reset:
Indeterminate afte reset
R
= Reserved
Figure 21-3. ADC Data Register (ADR)
21.7.3 ADC Input Clock Register
This register selects the clock frequency for the ADC.
Address: $003A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
ADIV2 ADIV1 ADIV0 ADICLK
Write:
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R
= Reserved
Figure 21-4. ADC Input Clock Register (ADICLK)
MC68HC908AT32 Data Sheet, Rev. 3.1
230
Freescale Semiconductor