MC68HC908AT32 Datasheet, PDF (45/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 7
6
5
4
3
2
1
Bit 0
$004D
TIM Counter Register Low (TCNTL)
See page 223.
Write:
Reset: 0
0
0
0
0
0
0
0
Read:
$004E
TIM Modulo Register High (TMODH)
See page 224.
Write:
Bit 15
14
13
12
11
10
9
Bit 8
Reset: 1
1
1
1
1
1
1
1
Read:
$004F
TIM Modulo Register Low (TMODL)
See page 224.
Write:
Bit 7
6
5
4
3
2
1
Bit 0
Reset: 1
1
1
1
1
1
1
1
$FE00
SIM Break Status Register ^Read: _R
R
R
R
R
SBSW
R
R
(SBSR) Write:
See Note
See page 89. _Reset:
0
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
COP ILOP
ILAD
0
$FE01
SIM Reset Status Register (SRSR)
See page 90.
Write:
Reset: 1
X
0
0
0
0
$FE03
SIM Break Flag Control Register ^Read: _BCFE
R
R
R
R
R
(SBFCR) Write:
See page 91. _{Reset: 0}
$FE09
Configuration Write-Once Register ^Read:
0
0
0 MSCAND 0
0
(CONFIG-2) Write:
See page 111. _{Reset: 0}
0
0
1
0
0
$FE0B
FLASH Control Register ^Read: _{FDIV1 FDIV0}
BLKI
BLKO HVEN VERF
(FLCR) Write:
See page 51. _{Reset: 0}
0
0
0
0
0
Read:
$FE0C
Break Address Register High (BRKH)
See page 116.
Write:
Bit 15
14
13
12
11
10
Reset: 0
0
0
0
0
0
Read:
$FE0D
Break Address Register Low (BRKL)
See page 116.
Write:
Bit 7
6
5
4
3
2
Reset: 0
0
0
0
0
0
$FE0E
Break Status and Control ^Read: _{BRKE BRKA}
0
0
0
0
Register (BRKSCR) Write:
See page 115. _{Reset: 0}
0
0
0
0
0
$FE0F
LVI Status Register ^{Read: LVIOUT}
0
0
0
0
0
(LVISR) Write:
See page 130. _{Reset: 0}
0
0
0
0
0
Italic Type = MC68HC08AS20 Specific
Boldface Type = MC68HC08AZ32 Specific
= Unimplemented
R = Reserved
LVI
0
X
0
R
R
0
MEMEXT AZ32
1
0
ERASE PGM
0
0
9
Bit 8
0
0
1
Bit 0
0
0
0
0
0
0
0
0
0
0
U = Unaffected
X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 8 of 9)
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
45