MC68HC908AT32 Datasheet, PDF (233/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 22
MC68HC08AZ32 Emulator Input/Output Ports
NOTE
This input/output (I/O) description is for MC68HC08AZ32 emulator only.
22.1 Introduction
FIfty bidirectional input/output (I/O) form seven parallel ports. All I/O pins are programmable as inputs or
outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 235. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 237. _Reset:
Port C Data Register ^Read:
(PTC) Write:
See page 239. _Reset:
Port D Data Register ^Read:
(PTD) Write:
See page 241. _Reset:
Data Direction Register A ^Read:
(DDRA) Write:
See page 235. _Reset:
Data Direction Register B ^Read:
(DDRB) Write:
See page 237. _Reset:
Bit 7
PTA7
PTB7
0
R
PTD7
DDRA7
0
DDRB7
0
R
6
PTA6
5
PTA5
PTB6 PTB5
0
PTC5
R
PTD6 PTD5
DDRA6 DDRA5
0
0
DDRB6 DDRB5
0
0
= Reserved
4
3
PTA4 PTA3
Unaffected by reset
PTB4 PTB3
Unaffected by reset
PTC4 PTC3
Unaffected by reset
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
Figure 22-1. MC68HC08AZ32 Emulator I/O Port Register Summary
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
233