MC68HC908AT32 Datasheet, PDF (181/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

I/O Registers
MODF — Mode Fault Bit
This clearable, read-only flag is set in a slave SPI if the SS pin goes high during a transmission. In a
master SPI, the MODF flag is set if the SS pin goes low at any time. Clear the MODF bit by reading
the SPI status and control register with MODF set and then writing to the SPI data register. Reset
clears the MODF bit.
1 = SS pin at inappropriate logic level
0 = SS pin at appropriate logic level
SPTE — SPI Transmitter Empty Bit
This clearable, read-only flag is set each time the transmit data register transfers a byte into the shift
register. SPTE generates an SPTE CPU interrupt request if the SPTIE bit in the SPI control register is
set also.
NOTE
Do not write to the SPI data register unless the SPTE bit is high.
For an idle master or idle slave that has no data loaded into its transmit buffer, the SPTE will be set
again within two bus cycles since the transmit buffer empties into the shift register. This allows the user
to queue up a 16-bit value to send. For an already active slave, the load of the shift register cannot
occur until the transmission is completed. This implies that a back-to-back write to the transmit data
register is not possible. The SPTE indicates when the next write can occur. Reset sets the SPTE bit.
1 = Transmit data register empty
0 = Transmit data register not empty
MODFEN — Mode Fault Enable Bit
This read/write bit, when set to 1, allows the MODF flag to be set. If the MODF flag is set, clearing the
MODFEN does not clear the MODF flag. If the SPI is enabled as a master and the MODFEN bit is low,
then the SS pin is available as a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a general- purpose I/O. When the SPI is
enabled as a slave, the SS pin is not available as a general-purpose I/O regardless of the value of
MODFEN. See 17.12.4 SS (Slave Select).
If the MODFEN bit is low, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. See 17.6.2 Mode Fault
Error.
SPR1 and SPR0 — SPI Baud Rate Select Bits
In master mode, these read/write bits select one of four baud rates as shown in Table 17-4. SPR1 and
SPR0 have no effect in slave mode. Reset clears SPR1 and SPR0.
Table 17-4. SPI Master Baud Rate Selection
SPR1:SPR0
00
01
10
11
Baud Rate Divisor (BD)
2
8
32
128
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
181