MC68HC908AT32 Datasheet, PDF (264/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

MSCAN Controller
23.12 Programmer’s Model of Message Storage
This section details the organization of the receive and transmit message buffers and the associated
control registers. For reasons of programmer interface simplification, the receive and transmit message
buffers have the same outline. Each message buffer allocates 16 bytes in the memory map containing a
13-byte data structure. An additional transmit buffer priority register (TBPR) is defined for the transmit
buffers.
Addr.
Register Name
$05b0
IDENTIFIER REGISTER 0
$05b1
IDENTIFIER REGISTER 1
$05b2
IDENTIFIER REGISTER 2
$05b3
IDENTIFIER REGISTER 3
$05b4
DATA SEGMENT REGISTER 0
$05b5
DATA SEGMENT REGISTER 1
$05b6
DATA SEGMENT REGISTER 2
$05b7
DATA SEGMENT REGISTER 3
$05b8
DATA SEGMENT REGISTER 4
$05b9
DATA SEGMENT REGISTER 5
$05bA
DATA SEGMENT REGISTER 6
$05bB
DATA SEGMENT REGISTER 7
$05bC
$05bD
DATA LENGTH REGISTER
TRANSMIT BUFFER PRIORITY REGISTER⁽¹⁾
$05bE
UNUSED
$05bF
UNUSED
1. Not applicable for receive buffers
Figure 23-9. Message Buffer Organization
MC68HC908AT32 Data Sheet, Rev. 3.1
264
Freescale Semiconductor