MC68HC908AT32 Datasheet, PDF (250/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

MC68HC08AZ32 Emulator Input/Output Ports
22.9.2 Data Direction Register H
Data direction register H determines whether each port H pin is an input or an output. Writing a logic 1 to
a DDRH bit enables the output buffer for the corresponding port H pin; a logic 0 disables the output
buffer.
Address: $000F
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
DDRH1 DDRH0
Write: R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R
= Reserved
Figure 22-24. Data Direction Register H (DDRH)
DDRH[1:0] — Data Direction Register H Bits
These read/write bits control port H data direction. Reset clears DDRG[1:0], configuring all port H pins
as inputs.
1 = Corresponding port H pin configured as output
0 = Corresponding port H pin configured as input
NOTE
Avoid glitches on port H pins by writing to the port H data register before
changing data direction register H bits from 0 to 1.
Figure 22-25 shows the port H I/O logic.
READ DDRH ($000F)
WRITE DDRH ($000F)
RESET
WRITE PTH ($000B)
DDRHx
PTHx
PTHx
READ PTH ($000B)
Figure 22-25. Port H I/O Circuit
When bit DDRHx is a logic 1, reading address $000B reads the PTHx data latch. When bit DDRHx is a
logic 0, reading address $000B reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 22-8 summarizes the operation of the port H pins.
Table 22-8. Port H Pin Functions
DDRH
Bit
PTH
Bit
I/O Pin
Mode
Accesses to
DDRH
Read/Write
0
X
Input, Hi-Z DDRH[1:0]
1
X
Output
DDRH[1:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTH
Read
Pin
PTH[1:0]
Write
PTH[1:0]⁽¹⁾
PTH[1:0]
MC68HC908AT32 Data Sheet, Rev. 3.1
250
Freescale Semiconductor