MC68HC908AT32 Datasheet, PDF (328/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

MC68HC08AS20 Emulator Input/Output Ports
DDRF[3:0] — Data Direction Register F Bits
These read/write bits control port F data direction. Reset clears DDRF[3:0], configuring all port F pins
as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
NOTE
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
Figure 27-19 shows the port F I/O logic.
READ DDRF ($000D)
WRITE DDRF ($000D)
RESET
DDRFx
WRITE PTF ($0009)
PTFx
PTFx
READ PTF ($0009)
Figure 27-19. Port F I/O Circuit
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 27-6 summarizes the operation of the port F pins.
Table 27-6. Port F Pin Functions
Accesses to
DDRF
PTF
I/O Pin
DDRF
Bit
Bit
Mode
Read/Write
0
X
Input, Hi-Z DDRF[3:0]
1
X
Output
DDRF[3:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTF
Read
Pin
PTF[3:0]
Write
PTF[3:0]⁽¹⁾
PTF[3:0]
MC68HC908AT32 Data Sheet, Rev. 3.1
328
Freescale Semiconductor