MC68HC908AT32 Datasheet, PDF (85/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

FROM RESET
Program Exception Control
BREAIKBINTTSEERTR?UPT? ^YES
NO
YES
I BIT SET?
NO
HARDWARE
INTERRUPT?
NO
YES
STACK CPU REGISTERS
SET I BIT
LOAD PC WITH INTERRUPT VECTOR
FETCH NEXT
INSTRUCTION
SWI
YES
INSTRUCTION?
NO
RTI
YES
INSTRUCTION?
NO
UNSTACK CPU REGISTERS
EXECUTE INSTRUCTION
Figure 7-10. Interrupt Processing
7.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a hardware interrupt begins after
completion of the current instruction. When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the condition code register), and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
85