MC68HC908AT32 Datasheet, PDF (55/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH Block Protect Register
with an external voltage V_DD + V_HI present on the IRQ pin. This voltage also allows entry from reset into
the monitor mode.
4.8 FLASH Block Protect Register
The block protect register is implemented as a byte within the FLASH memory. Each bit, when
programmed, protects a range of addresses in the FLASH.
Address:
Read:
Write:
Reset:
$FF80
Bit 7
6
5
4
3
2
1
0
0
0
0
BPR3
BPR2
BPR1
0
0
0
0
0
0
0
= Unimplemented
Figure 4-2. FLASH Block Protect Register (FLBPR)
Bit 0
BPR0
0
BPR3 — Block Protect Register Bit 3
This bit protects the memory contents in the address range $C000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR2 — Block Protect Register Bit 2
This bit protects the memory contents in the address range $A000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR1 — Block Protect Register Bit 1
This bit protects the memory contents in the address range $9000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
BPR0 — Block Protect Register Bit 0
This bit protects the memory contents in the address range $8000 to $FFFF.
1 = Address range protected from erase or program
0 = Address range open to erase or program
By programming the block protect bits, a portion of the memory will be locked so that no further erase or
program operations may be performed. Programming more than one bit at a time is redundant. If both
bit 3 and bit 2 are set, for instance, the address range $A000 through $FFFF is locked. If all bits are
erased, then all of the memory is available for erase and program. The presence of a voltage V_DD + V_HI
on the IRQ pin will bypass the block protection so that all of the memory, including the block protect
register, is open for program and erase operations.
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
55