MC68HC908AT32 Datasheet, PDF (263/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

NRZ SIGNAL
Memory Map
SYNC
_SEG
1
TIME SEGMENT 1
(PROP_SEG + PHASE_SEG1)
4 ... 16
TIME SEG. 2
(PHASE_SEG2)
2 ... 8
8... 25 TIME QUANTA
= 1 BIT TIME
SAMPLE POINT
(SINGLE OR TRIPLE SAMPLING)
Figure 23-8. Segments within the Bit Time
Table 23-2. CAN Standard Compliant Bit Time
Segment Settings
Time Segment
1
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
TSEG1
4 .. 9
3 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
Time Segment
2
2
3
4
5
6
7
8
TSEG2
1
2
3
4
5
6
7
Synchron.
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
SJW
0 .. 1
0 .. 2
0 .. 3
0 .. 3
0 .. 3
0 .. 3
0 .. 3
23.11 Memory Map
The MSCAN08 occupies 128 bytes in the CPU08 memory space. The absolute mapping is
implementation dependent with the base address being a multiple of 128. The background receive buffer
can be read only in test mode.
NOTE
Due to design requirements, the absolute addresses and bit locations may
change with later revisions of this specification.
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
263