MC68HC908AT32 Datasheet, PDF (91/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

COP — COP Reset Flag
1 = COP reset since last read of RSR
0 = Power-on reset or read of RSR since last COP reset
ILOP — Illegal Opcode Reset Flag
1 = Illegal opcode reset since last read of RSR
0 = Power-on reset or read of RSR since last illegal opcode reset
ILAD — Illegal Address Reset Flag
1 = Illegal address reset since last read of RSR
0 = Power-on reset or read of RSR since last illegal address reset
LVI — Low-Voltage Inhibit Reset Flag
1 = LVI reset since last read of RSR
0 = Power-on reset or read of RSR since last LVI reset
SIM Registers
7.7.3 SIM Break Flag Control Register
The SIM break control register contains a bit that enables software to clear status bits while the MCU is
in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset: 0
0
R
= Reserved
Figure 7-19. SIM Break Flag Control Register (SBFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
91