MC68HC908AT32 Datasheet, PDF (234/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

MC68HC08AZ32 Emulator Input/Output Ports
Addr.
$0006
$0007
$0008
$0009
$000A
$000B
$000C
$000D
$000E
$000F
Register Name
Bit 7
6
5
Data Direction Register C
Read:
MCLKEN
0
(DDRC) Write:
R
See page 239. _{Reset: 0}
0
DDRC5
0
Data Direction Register D ^Read:
(DDRD) Write:
See page 241. _Reset:
DDRD7
0
DDRD6
0
DDRD5
0
Port E Data Register ^Read:
(PTE) Write:
See page 243. _Reset:
PTE7
PTE6
PTE5
Port F Data Register ^{Read: 0}
(PTF) Write: R
See page 245. _Reset:
PTF6 PTF5
Port G Data Register ^{Read: 0}
0
0
(PTG) Write: R
R
R
See page 247. _Reset:
Port H Data Register ^{Read: 0}
0
0
(PTH) Write: R
R
R
See page 249. _Reset:
Data Direction Register E ^Read:
(DDRE) Write:
See page 244. _Reset:
DDRE7
0
DDRE6
0
DDRE5
0
Data Direction Register F ^{Read: 0}
(DDRF) Write: R
See page 246. _{Reset: 0}
DDRF6 DDRF5
0
0
Data Direction Register G ^{Read: 0}
0
0
(DDRG) Write: R
R
R
See page 248. _{Reset: 0}
0
0
Data Direction Register H ^{Read: 0}
0
0
(DDRH) Write: R
R
R
See page 250. _{Reset: 0}
0
0
R = Reserved
4
3
DDRC4 DDRC3
0
0
DDRD4 DDRD3
0
0
PTE4 PTE3
Unaffected by reset
PTF4 PTF3
Unaffected by reset
0
0
R
R
Unaffected by reset
0
0
R
R
Unaffected by reset
DDRE4 DDRE3
0
0
DDRF4 DDRF3
0
0
0
0
R
R
0
0
0
0
R
R
0
0
2
DDRC2
0
DDR2
0
PTE2
PTF2
PTG2
0
R
DDRE2
0
DDRF2
0
DDRG2
0
0
R
0
1
DDRC1
0
DDRD1
0
PTE1
PTF1
PTG1
PTH1
DDRE1
0
DDRF1
0
DDRG1
0
DDRH1
0
Bit 0
DDRC0
0
DDRD0
0
PTE0
PTF0
PTG0
PTH0
DDRE0
0
DDRF0
0
DDRG0
0
DDRH0
0
Figure 22-1. MC68HC08AZ32 Emulator I/O Port Register Summary (Continued)
MC68HC908AT32 Data Sheet, Rev. 3.1
234
Freescale Semiconductor