MC68HC908AT32 Datasheet, PDF (39/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
$0005
Data Direction Register B ^Read:
(DDRB) Write:
See page 237. _Reset:
DDRB7
0
DDRB6
0
DDRB5
0
DDRB4
0
DDRB3
0
DDRB2
0
DDRB1
0
DDRB0
0
$0006
Data Direction Register C
Read:
MCLKEN
0
(DDRC) Write:
R
See page 239. _{Reset: 0}
0
DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
0
0
0
0
0
0
$0007
Data Direction Register D ^Read:
(DDRD) Write:
See page 241. _Reset:
DDRD7
0
DDRD6
0
DDRD5
0
DDRD4
0
DDRD3
0
DDR2
0
DDRD1 DDRD0
0
0
$0008
Port E Data Register ^Read:
(PTE) Write:
See page 243. _Reset:
PTE7
PTE6
PTE5
PTE4 PTE3
Unaffected by reset
PTE2
PTE1
PTE0
$0009
Port F Data Register ^{Read: 0}
(PTF) Write: R
See page 245. _Reset:
PTF6
PTF5
PTF4 PTF3
Unaffected by reset
PTF2
PTF1
PTF0
$000A
Port G Data Register ^{Read: 0}
0
0
0
0
PTG2 PTG1 PTG0
(PTG) Write: R
R
R
R
R
See page 247. _Reset:
Unaffected by reset
$000B
Port H Data Register ^{Read: 0}
0
0
0
0
0
PTH1 PTH0
(PTH) Write: R
R
R
R
R
R
See page 249. _Reset:
Unaffected by reset
$000C
Data Direction Register E ^Read:
(DDRE) Write:
See page 244. _Reset:
DDRE7
0
DDRE6
0
DDRE5
0
DDRE4
0
DDRE3
0
DDRE2
0
DDRE1
0
DDRE0
0
$000D
Data Direction Register F ^{Read: 0}
(DDRF) Write: R
See page 246. _{Reset: 0}
DDRF6 DDRF5 DDRF4 DDRF3 DDRF2 DDRF1 DDRF0
0
0
0
0
0
0
0
$000E
Data Direction Register G ^{Read: 0}
0
0
0
0
DDRG2 DDRG1 DDRG0
(DDRG) Write: R
R
R
R
R
See page 248. _{Reset: 0}
0
0
0
0
0
0
0
$000F
Data Direction Register H ^{Read: 0}
0
0
0
0
0
DDRH1 DDRH0
(DDRH) Write: R
R
R
R
R
R
See page 250. _{Reset: 0}
0
0
0
0
0
0
0
$0010
SPI Control Register ^Read:
(SPCR) Write:
See page 178. _Reset:
SPRIE
0
R SPMSTR CPOL CPHA SPWOM SPE SPTIE
0
1
0
1
0
0
0
Italic Type = MC68HC08AS20 Specific
Boldface Type = MC68HC08AZ32 Specific
= Unimplemented
R = Reserved
U = Unaffected
X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 9)
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
39