MC68HC908AT32 Datasheet, PDF (315/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 27
MC68HC08AS20 Emulator Input/Output Ports
27.1 Introduction
Forty bidirectional input/output (I/O) pins form six parallel ports. All I/O pins are programmable as inputs
or outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Addr.
Register Name
Bit 7
$0000
Port A Data Register ^Read: _PTA7
(PTA) Write:
See page 317. _Reset:
$0001
Port B Data Register ^Read:
(PTB) Write:
See page 318. _Reset:
PTB7
$0002
Port C Data Register ^{Read: 0}
(PTC) Write: R
See page 320. _Reset:
$0003
Port D Data Register ^Read:
(PTD) Write:
See page 322. _Reset:
PTD7
$0004
Data Direction Register A ^Read:
(DDRA) Write:
See page 317. _Reset:
DDRA7
$0005
Data Direction Register B ^Read:
(DDRB) Write:
See page 319. _Reset:
DDRB7
0
$0006
Data Direction Register C
Read:
MCLKEN
(DDRC) Write:
See page 321. _{Reset: 0}
Boldface Type = MC68HC08AZ32 Specific
6
PTA6
PTB6
0
R
PTD6
DDRA6
DDRB6
0
0
R
0
5
PTA5
PTB5
PTC5
PTD5
DDRA5
DDRB5
0
DDRC5
0
4
3
PTA4 PTA3
Unaffected by reset
PTB4 PTB3
Unaffected by reset
PTC4 PTC3
Unaffected by reset
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
Unaffected by reset
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
DDRB2
0
DDRC2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
DDRB1
0
DDRC1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
DDRB0
0
DDRC0
0
Figure 27-1. MC68HC08AS20 Emulator I/O Port Register Summary
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
315