MC68HC908AT32 Datasheet, PDF (303/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

I/O Registers
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port E or port F, and pin
PTEx/TACHx or pin PTFx/TACHx is available as a general-purpose I/O pin. However, channel x is at
a state determined by these bits and becomes transparent to the respective pin when PWM, input
capture mode, or output compare operation mode is enabled. Table 25-2 shows how ELSxB and
ELSxA work. Reset clears the ELSxB and ELSxA bits.
NOTE
Before enabling a TIMA channel register for input capture operation, make
sure that the PTEx/TACHx pin or PTFx/TACHx pin is stable for at least two
bus clocks.
TOVx — Toggle-On-Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIMA counter overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIMA counter overflow.
0 = Channel x pin does not toggle on TIMA counter overflow.
NOTE
When TOVx is set, a TIMA counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at logic 0, setting the CHxMAX bit forces the duty cycle of buffered and
unbuffered PWM signals to 100%. As Figure 25-8 shows, the CHxMAX bit takes effect in the cycle after
it is set or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is
cleared.
Table 25-2. Mode, Edge, and Level Selection
MSxB:MSxA
X0
X1
00
00
00
01
01
01
1X
1X
1X
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Mode
Configuration
Output preset
Pin under port control;
Initialize timer
Output level high
Pin under port control;
Initialize timer
Output level low
Capture on rising edge only
Input capture Capture on falling edge only
Capture on rising or falling edge
Output compare
or PWM
Toggle output on compare
Clear output on compare
Set output on compare
Buffered
Toggle output on compare
output compare Clear output on compare
or buffered PWM _{Set output on compare}
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
303