MC68HC908AT32 Datasheet, PDF (285/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

I/O Registers
Address: $001B
Bit 7
Read: 0
Write:
Reset: 0
6
5
0
0
0
0
= Unimplemented
4
3
2
1
Bit 0
0
KEYF
0
IMASKK MODEK
ACKK
0
0
0
0
0
Figure 24-3. Keyboard Status and Control Register (KBSCR)
Bits 7–4 — Not used
These read-only bits always read as logic 0s.
KEYF — Keyboard Flag Bit
This read-only bit is set when a keyboard interrupt is pending. Reset clears the KEYF bit.
1 = Keyboard interrupt pending
0 = No keyboard interrupt pending
ACKK — Keyboard Acknowledge Bit
Writing a logic 1 to this write-only bit clears the keyboard interrupt request. ACKK always reads as logic
0. Reset clears ACKK.
IMASKK — Keyboard Interrupt Mask Bit
Writing a logic 1 to this read/write bit prevents the output of the keyboard interrupt mask from
generating interrupt requests. Reset clears the IMASKK bit.
1 = Keyboard interrupt requests masked
0 = Keyboard interrupt requests not masked
MODEK — Keyboard Triggering Sensitivity Bit
This read/write bit controls the triggering sensitivity of the keyboard interrupt pins. Reset clears
MODEK.
1 = Keyboard interrupt requests on falling edges and low levels
0 = Keyboard interrupt requests on falling edges only
24.7.2 Keyboard Interrupt Enable Register
The keyboard interrupt enable register enables or disables each port G and each port H pin to operate as
a keyboard interrupt pin.
Address: $0021
Bit 7
Read: 0
Write:
Reset: 0
6
5
0
0
0
0
= Unimplemented
4
KBIE4
0
3
KBIE3
0
2
KBIE2
0
1
KBIE1
0
Figure 24-4. Keyboard Interrupt Enable Register (KBIER)
Bit 0
KBIE0
0
KBIE4–KBIE0 — Keyboard Interrupt Enable Bits
Each of these read/write bits enables the corresponding keyboard interrupt pin to latch interrupt
requests. Reset clears the keyboard interrupt enable register.
1 = PDx pin enabled as keyboard interrupt pin
0 = PDx pin not enabled as keyboard interrupt pin
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
285