MC68HC908AT32 Datasheet, PDF (237/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port B
22.3 Port B
Port B is an 8-bit special function port that shares all of its pins with the analog-to-digital converter.
22.3.1 Port B Data Register
The port B data register contains a data latch for each of the eight port B pins.
Address:
Read:
Write:
Reset:
Alternate
Functions:
$0001
Bit 7
PTB7
ATD7
6
5
4
3
2
PTB6
PTB5
PTB4
PTB3
PTB2
Unaffected by reset
ATD6
ATD5
ATD4
ATD3
ATD2
Figure 22-5. Port B Data Register (PTB)
1
PTB1
ATD1
Bit 0
PTB0
ATD0
PTB[7:0] — Port B Data Bits
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
ATD[7:0] — ADC Channels
PTB7/ATD7–PTB0/ATD0 are eight of the analog-to-digital converter channels. The ADC channel
select bits, CH[4:0], determine whether the PTB7/ATD7–PTB0/ATD0 pins are ADC channels or
general-purpose I/O pins. If an ADC channel is selected and a read of this corresponding bit in the
port B data register occurs, the data will be 0 if the data direction for this bit is programmed as an input.
Otherwise, the data will reflect the value in the data latch. (See Chapter 21 Analog-to-Digital Converter
(ADC-8).) Data direction register B (DDRB) does not affect the data direction of port B pins that are
being used by the ADC. However, the DDRB bits always determine whether reading port B returns to
the states of the latches or logic 0.
22.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a logic 1 to
a DDRB bit enables the output buffer for the corresponding port B pin; a logic 0 disables the output
buffer.
Address: $0005
Bit 7
6
5
4
3
2
1
Bit 0
Read:
DDRB7
Write:
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Reset: 0
0
0
0
0
0
0
0
Figure 22-6. Data Direction Register B (DDRB)
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
MC68HC908AT32 Data Sheet, Rev. 3.1
Freescale Semiconductor
237