MC68HC908AT32 Datasheet, PDF (364/378 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Specifications
SS
INPUT
SS PIN OF MASTER HELD HIGH
SCK (CPOL = 0)
OUTPUT
NOTE
1
5
4
SCK (CPOL = 1)
OUTPUT
NOTE
5
4
12
12
MISO
INPUT
10 (REF)
MOSI
OUTPUT
13
MSB IN
11
MASTER MSB OUT
BIT 6–1
10
BIT 6–1
Note: This first clock edge is generated internally, but is not seen at the SCK pin.
a) SPI Master Timing (CPHA = 0)
13
12
13
6
7
LSB IN
11 (REF)
MASTER LSB OUT
12
SS
INPUT
SCK (CPOL = 0)
OUTPUT
SS PIN OF MASTER HELD HIGH
1
5
4
SCK (CPOL = 1)
OUTPUT
5
4
MISO
INPUT
10 (REF)
MOSI
OUTPUT
13
MSB IN
11
MASTER MSB OUT
13
12
12
13
BIT 6–1
10
BIT 6–1
6
7
LSB IN
11
MASTER LSB OUT
12
Note: This last clock edge is generated internally, but is not seen at the SCK pin.
b) SPI Master Timing (CPHA = 1)
NOTE
NOTE
Figure 29-1. SPI Master Timing Diagram
MC68HC908AT32 Data Sheet, Rev. 3.1
364
Freescale Semiconductor