EP4CE30F29C7N Datasheet, PDF (378/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1

2–4
Chapter 2: Cyclone IV Reset Control and Power Down
Transceiver Reset Sequences
Table 2–3. Blocks Affected by Reset and Power-Down Signals (Part 2 of 2)
Transceiver Block
Serializer
Transmitter Buffer
Transmitter XAUI State
Machine
Receiver Buffer
Receiver CDR
Receiver Deserializer
Receiver Word Aligner
Receiver Deskew FIFO
Receiver Clock Rate
Compensation FIFO
Receiver 8B/10B
Decoder
Receiver Byte
Deserializer
Receiver Byte Ordering
Receiver Phase
Compensation FIFO
Receiver XAUI State
Machine
BIST Verifiers
rx_digitalreset
—
—
—
—
—
—
v
v
v
v
v
v
v
v
v
rx_analogreset
—
—
—
—
v
—
—
—
—
—
—
—
—
—
—
tx_digitalreset
v
—
v
—
—
—
—
—
—
—
—
—
—
—
—
pll_areset
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
gxb_powerdown
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Transceiver Reset Sequences
You can configure transceiver channels in Cyclone IV GX devices in various
configurations. In all functional modes except XAUI functional mode, transceiver
channels can be either bonded or non-bonded. In XAUI functional mode, transceiver
channels must be bonded. In PCI Express^® (PCIe^®) functional mode, transceiver
channels can be either bonded or non-bonded and need to follow a specific reset
sequence.
The two categories of reset sequences for Cyclone IV GX devices described in this
chapter are:
■ “All Supported Functional Modes Except the PCIe Functional Mode” on
page 2–6—describes the reset sequences in bonded and non-bonded
configurations.
■ “PCIe Functional Mode” on page 2–17—describes the reset sequence for the
initialization/compliance phase and the normal operation phase in PCIe
functional modes.
Cyclone IV Device Handbook,
Volume 2
May 2013 Altera Corporation