EP4CE30F29C7N Datasheet, PDF (209/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
8–45
Table 8–13. FPP Timing Parameters for Cyclone IV Devices (Part 2 of 2)
Symbol
Parameter
Minimum
Cyclone IV ⁽¹⁾ Cyclone IV E ⁽²⁾
Maximum
Unit
Cyclone IV ⁽¹⁾ Cyclone IV E ⁽²⁾
t_CF2ST1
t_CF2CK
t_ST2CK
t_DH
t_CD2UM
nCONFIG high to
nSTATUS high
nCONFIG high to
first rising edge on
DCLK
nSTATUS high to
first rising edge of
DCLK
Data hold time after
rising edge on
DCLK
CONF_DONE high to
user mode ⁽⁵⁾
—
230 ⁽³⁾
2
0
300
230 ⁽⁴⁾
µs
—
µs
—
µs
—
ns
650
µs
t_CD2CU
t_CD2UMC
CONF_DONE high to
CLKUSR enabled
CONF_DONE high to
user mode with
CLKUSR option on
4 × maximum DCLK period
t_CD2CU + (3,192 × CLKUSR period)
—
—
—
—
Data setup time
t_DSU
before rising edge
5
8
—
—
ns
on DCLK
t_CH
DCLK high time
3.2
6.4
—
—
ns
t_CL
DCLK low time
3.2
6.4
—
—
ns
t_CLK
DCLK period
7.5
15
—
—
ns
f_MAX
DCLK frequency ⁽⁶⁾
—
—
133
66
Notes to Table 8–13:
(1) Applicable for Cyclone IV GX and Cyclone IV E with 1.2-V core voltage.
(2) Applicable for Cyclone IV E with 1.0-V core voltage.
(3) This value is applicable if you do not delay configuration by extending the nCONFIG or nSTATUS low pulse width.
(4) This value is applicable if you do not delay configuration by externally holding the nSTATUS low.
(5) The minimum and maximum numbers apply only if you choose the internal oscillator as the clock source for starting the device.
(6) Cyclone IV E devices with 1.0-V core voltage have slower F_MAX when compared with Cyclone IV GX devices with 1.2-V core voltage.
MHz
JTAG Configuration
JTAG has developed a specification for boundary-scan testing (BST). The BST
architecture offers the capability to efficiently test components on PCBs with tight
lead spacing. The BST architecture can test pin connections without using physical
test probes and capture functional data while a device is normally operating. You can
also use the JTAG circuitry to shift configuration data into the device. The Quartus II
software automatically generates .sof for JTAG configuration with a download cable
in the Quartus II software Programmer.
May 2013 Altera Corporation
Cyclone IV Device Handbook,
Volume 1