|
EP4CE30F29C7N Datasheet, PDF (108/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1 | |||
|
◁ |
6â2
Chapter 6: I/O Features in Cyclone IV Devices
Cyclone IV I/O Elements
â âPad Placement and DC Guidelinesâ on page 6â23
â âClock Pins Functionalityâ on page 6â23
â âHigh-Speed I/O Interfaceâ on page 6â24
â âHigh-Speed I/O Standards Supportâ on page 6â28
â âTrue Differential Output Buffer Featureâ on page 6â35
â âHigh-Speed I/O Timingâ on page 6â36
â âDesign Guidelinesâ on page 6â37
â âSoftware Overviewâ on page 6â38
Cyclone IV I/O Elements
Cyclone IV I/O elements (IOEs) contain a bidirectional I/O buffer and five registers
for registering input, output, output-enable signals, and complete embedded
bidirectional single-data rate transfer. I/O pins support various single-ended and
differential I/O standards.
The IOE contains one input register, two output registers, and two output-enable (OE)
registers. The two output registers and two OE registers are used for DDR
applications. You can use input registers for fast setup times and output registers for
fast clock-to-output times. Additionally, you can use OE registers for fast
clock-to-output enable timing. You can use IOEs for input, output, or bidirectional
data paths.
Cyclone IV Device Handbook,
Volume 1
May 2013 Altera Corporation
|
▷ |