English
Language : 

EP4CE30F29C7N Datasheet, PDF (228/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1
8–64
Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Table 8–19. Configuration Pin Summary for Cyclone IV E Devices (Part 3 of 3)
Bank
Description
Input/Output
Dedicated
Powered By
Configuration Mode
5 DEV_CLRn
Input
—
VCCIO
Optional, AP
Notes to Table 8–19:
(1) To tri-state AS configuration pins in the AS configuration scheme, turn-on the Enable input tri-state on active configuration pins in user mode
option from the Device and Pin Options dialog box. This tri-states DCLK, nCSO, Data[0], and Data[1]/ASDO pins. Dual-purpose pins settings
for these pins are ignored. To set these pins to different settings, turn off the Enable input tri-state on active configuration pins in user mode
option and set the desired setting from the Dual-purpose Pins Setting menu.
(2) To tri-state AP configuration pins in the AP configuration scheme, turn-on the Enable input tri-state on active configuration pins in user mode
option from the Device and Pin Options dialog box. This tri-states DCLK, Data[0..15], FLASH_nCE, and other AP pins. Dual-purpose pins
settings for these pins are ignored. To set these pins to different settings, turn off the Enable input tri-state on active configuration pins in
user mode option and set the desired setting from the Dual-purpose Pins Setting menu.
(3) The CRC_ERROR pin is not available in Cyclone IV E devices with 1.0-V core voltage.
(4) The CRC_ERROR pin is a dedicated open-drain output or an optional user I/O pin. Active high signal indicates that the error detection circuit has
detected errors in the configuration SRAM bits. This pin is optional and is used when the CRC error detection circuit is enabled in the Quartus II
software from the Error Detection CRC tab of the Device and Pin Options dialog box. When using this pin, connect it to an external 10-kΩ
pull-up resistor to an acceptable voltage that satisfies the input voltage of the receiving device.
Table 8–20 describes the dedicated configuration pins. You must properly connect
these pins on your board for successful configuration. You may not need some of
these pins for your configuration schemes.
Table 8–20. Dedicated Configuration Pins on the Cyclone IV Device (Part 1 of 4)
Pin Name
MSEL
nCONFIG
nSTATUS
User Mode
N/A
N/A
N/A
Configuration
Scheme
All
All
All
Pin Type
Input
Input
Bidirectional
open-drain
Description
Configuration input that sets the Cyclone IV device
configuration scheme. You must hardwire these pins to
VCCA or GND. The MSEL pins have internal 9-kΩ pull-down
resistors that are always active.
Configuration control input. Pulling this pin low with
external circuitry during user mode causes the Cyclone IV
device to lose its configuration data, enter a reset state, and
tri-state all I/O pins. Returning this pin to a logic-high level
starts a reconfiguration.
The Cyclone IV device drives nSTATUS low immediately
after power-up and releases it after the POR time.
■ Status output—if an error occurs during configuration,
nSTATUS is pulled low by the target device.
■ Status input—if an external source (for example,
another Cyclone IV device) drives the nSTATUS pin low
during configuration or initialization, the target device
enters an error state.
Driving nSTATUS low after configuration and initialization
does not affect the configured device. If you use a
configuration device, driving nSTATUS low causes the
configuration device to attempt to configure the device, but
because the device ignores transitions on nSTATUS in user
mode, the device does not reconfigure. To start a
reconfiguration, you must pull nCONFIG low.
Cyclone IV Device Handbook,
Volume 1
May 2013 Altera Corporation