EP4CE30F29C7N Datasheet, PDF (104/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1

5–42
Chapter 5: Clock Networks and PLLs in Cyclone IV Devices
Document Revision History
Document Revision History
Table 5–14 lists the revision history for this chapter.
Table 5–14. Document Revision History
Date
October 2012
November 2011
December 2010
July 2010
February 2010
November 2009
Version
2.4
2.3
2.2
2.1
2.0
1.0
Changes
■ Updated “Manual Override” and “PLL Cascading” sections.
■ Updated Figure 5–9.
■ Updated the “Dynamic Phase Shifting” section.
■ Updated Figure 5–26.
■ Updated for the Quartus II software version 10.1 release.
■ Updated Figure 5–3 and Figure 5–10.
■ Updated “GCLK Network Clock Source Generation”, “PLLs in Cyclone IV Devices”,
and “Manual Override” sections.
■ Minor text edits.
■ Updated Figure 5–2, Figure 5–3, Figure 5–4, and Figure 5–10.
■ Updated Table 5–1, Table 5–2, and Table 5–5.
■ Updated “Clock Feedback Modes” section.
■ Added Cyclone IV E devices information for the Quartus II software version 9.1 SP1
release.
■ Updated “Clock Networks” section.
■ Updated Table 5–1 and Table 5–2.
■ Added Table 5–3.
■ Updated Figure 5–2, Figure 5–3, and Figure 5–9.
■ Added Figure 5–4 and Figure 5–10.
Initial release.
Cyclone IV Device Handbook,
Volume 1
October 2012 Altera Corporation