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EP4CE30F29C7N Datasheet, PDF (130/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1 | |||
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6â24
Chapter 6: I/O Features in Cyclone IV Devices
High-Speed I/O Interface
High-Speed I/O Interface
Cyclone IV E I/Os are separated into eight I/O banks, as shown in Figure 6â9 on
page 6â17. Cyclone IV GX I/Os are separated into six user I/O banks with the left
side of the device as the transceiver block, as shown in Figure 6â10 on page 6â18. Each
bank has an independent power supply. True output drivers for LVDS, RSDS,
mini-LVDS, and PPDS are on the right I/O banks. On the Cyclone IV E row I/O banks
and the Cyclone IV GX right I/O banks, some of the differential pin pairs (p and n
pins) of the true output drivers are not located on adjacent pins. In these cases, a
power pin is located between the p and n pins. These I/O standards are also
supported on all I/O banks using two single-ended output with the second output
programmed as inverted, and an external resistor network. True input buffers for
these I/O standards are supported on the top, bottom, and right I/O banks except for
I/O bank 9.
Cyclone IV Device Handbook,
Volume 1
May 2013 Altera Corporation
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