EP4CE30F29C7N Datasheet, PDF (114/488 Pages) Altera Corporation – Cyclone IV Device Handbook, Volume 1

6–8
Chapter 6: I/O Features in Cyclone IV Devices
OCT Support
Table 6–2. Cyclone IV Device I/O Features Support (Part 2 of 2)
I/O Standard
IOH/IOL Current Strength
Setting (mA) ⁽¹⁾, ⁽⁹⁾
Column I/O
Row I/O
R_S OCT with
Calibration
Setting, Ohm (Ω)
Column Row
I/O
I/O ⁽⁸⁾
R_S OCT Without
Calibration
Setting, Ohm (Ω)
Column Row
I/O
I/O ⁽⁸⁾
Cyclone
IV E I/O
Banks
Support
Cyclone
IV GX I/O
Banks
Support
Slew
Rate
Option
(6)
PCI-
clamp
Diode
Support
BLVDS
8,12,16
8,12,16
—
—
—
—
3,4,5,6,
7,8
0,1,2
—
LVDS ⁽³⁾
—
—
—
—
—
—
—
—
PPDS ^{(3), (4)}
—
RSDS and mini-
LVDS ^{(3), (4)}
—
—
—
—
—
—
1,2,3,4,
5,6,7,8
5,6
—
—
—
—
—
—
—
—
—
Differential LVPECL
(5)
—
—
—
—
—
—
3,4,5,6,
7,8
—
—
Notes to Table 6–2:
(1) The default current strength setting in the Quartus II software is 50-Ω OCT without calibration for all non-voltage reference and HSTL/SSTL Class I I/O standards.
The default setting is 25-Ω OCT without calibration for HSTL/SSTL Class II I/O standards.
(2) The differential SSTL-18 and SSTL-2, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards are supported only on clock input pins and PLL output clock pins.
(3) True differential (PPDS, LVDS, mini-LVDS, and RSDS I/O standards) outputs are supported in row I/O banks 1, 2, 5, and 6 only for Cyclone IV E devices and right
I/O banks 5 and 6 only for Cyclone IV GX devices. Differential outputs in column I/O banks require an external resistor network.
(4) This I/O standard is supported for outputs only.
(5) This I/O standard is supported for clock inputs only
(6) The default Quartus II slew rate setting is in bold; 2 for all I/O standards that supports slew rate option.
(7) Differential SSTL-18, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards do not support Class II output.
(8) Cyclone IV GX devices only support right I/O pins.
(9) Altera not only offers current strength that meets the industrial standard specification but also other additional current strengths.
1 For more details about the differential I/O standards supported in Cyclone IV I/O
banks, refer to “High-Speed I/O Interface” on page 6–24.
On-Chip Series Termination with Calibration
Cyclone IV devices support R_S OCT with calibration in the top, bottom, and right I/O
banks. The R_S OCT calibration circuit compares the total impedance of the I/O buffer
to the external 25-Ω ±1% or 50-Ω ±1% resistors connected to the RUP and RDN pins, and
dynamically adjusts the I/O buffer impedance until they match (as shown in
Figure 6–2).
Cyclone IV Device Handbook,
Volume 1
May 2013 Altera Corporation