SH7606 Datasheet, PDF (70/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 2 CPU
• Shift Instructions
Instruction
ROTL Rn
ROTR Rn
ROTCL Rn
ROTCR Rn
SHAL Rn
SHAR Rn
SHLL Rn
SHLR Rn
SHLL2 Rn
SHLR2 Rn
SHLL8 Rn
SHLR8 Rn
SHLL16 Rn
SHLR16 Rn
Operation
T ← Rn ← MSB
LSB → Rn → T
T ← Rn ← T
T → Rn → T
T ← Rn ← 0
MSB → Rn → T
T ← Rn ← 0
0 → Rn → T
Rn << 2 → Rn
Rn >> 2 → Rn
Rn << 8 → Rn
Rn >> 8 → Rn
Rn << 16 → Rn
Rn >> 16 → Rn
Code
Execution
Cycles
0100nnnn00000100 1
0100nnnn00000101 1
0100nnnn00100100 1
0100nnnn00100101 1
0100nnnn00100000 1
0100nnnn00100001 1
0100nnnn00000000 1
0100nnnn00000001 1
0100nnnn00001000 1
0100nnnn00001001 1
0100nnnn00011000 1
0100nnnn00011001 1
0100nnnn00101000 1
0100nnnn00101001 1
T Bit
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
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Rev. 4.00 Sep. 13, 2007 Page 44 of 502
REJ09B0239-0400