SH7606 Datasheet, PDF (36/532 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH™ RISC engine Family / SH7606 Series

Section 1 Overview
Classifi-
cation
Host
interface
Abbr.
HIFRS
HIFWR
HIFRD
HIFINT
HIFMD
HIFDREQ
HIFRDY
HIFEBL
User
TCK
debugging
interface
(H-UDI)
TMS
TDI
TDO
I/O port
TRST
PA25 to
PA16
PB13 to
PB00
PC20 to
PC00
PD07 to
PD00
PE24 to
PE00
I/O Pin Name
Input HIF Register
Select
Input HIF Write
Input HIF Read
Output HIF Interrupt
Input HIF Mode
Output HIF DMAC
Transfer
Request
Output HIF Boot
Ready
Input HIF Pin
Enable
Input Test Clock
Description
Controls the access type switching for the HIF.
Write strobe signal
Read strobe signal
Interrupt request to external devices by the HIF
Specifies HIF boot mode.
Requests DMAC transfer for the HIFRAM to external
devices.
Indicates that a reset of the HIF has been cleared in this LSI
and the HIF is ready for accesses to it.
HIF pins other than this pin are enabled by driving this pin
high.
Test clock input pin
Input Test Mode
Select
Input Test Data
Input
Output Test Data
Output
Input Test Reset
Input/ General port
output
Input/ General port
output
Input/ General port
output
Input/ General port
output
Input/ General port
output
Input pin for test mode select signal
Serial input pin for an instruction and data
Serial output pin for an instruction and data
Input pin for initialization
Pins for 10-bit general input/output port
Pins for 14-bit general input/output port
Pins for 21-bit general input/output port
Pins for 8-bit general input/output port
Pins for 25-bit general input/output port
Rev. 4.00 Sep. 13, 2007 Page 10 of 502
REJ09B0239-0400